A model of programmable processors

ZAPOROJAN, Sergiu

dc.contributor.author	ZAPOROJAN, Sergiu
dc.date.accessioned	2021-10-12T06:26:50Z
dc.date.available	2021-10-12T06:26:50Z
dc.date.issued	1997
dc.identifier.citation	ZAPOROJAN, Sergiu. A model of programmable processors. In: Int. Conf. on Control Systems and Computer Science: proc. 11th Intern. Conf., 28-30 May, 1997, Bucharest, Romania, 1997, V. 2, pp. 19-23.	en_US
dc.identifier.uri	http://repository.utm.md/handle/5014/17682
dc.description.abstract	Designers of electronic systems use more and more programmable processors in their systems. The programmability of processing units is considered as an efficient approach to support the increasing requirement on the functions that the processing units should be able to perform. In the paper, a model of programmable processors is proposed. This model is quite suitable to be implemented as a device between the application specific instruction set processors and general programmable processors. The offered instruction sets are especially optimized for concrete applications.	en_US
dc.language.iso	en	en_US
dc.publisher	Universitatea Politehnica, Bucureşti	en_US
dc.rights	Attribution-NonCommercial-NoDerivs 3.0 United States	*
dc.rights.uri	http://creativecommons.org/licenses/by-nc-nd/3.0/us/	*
dc.subject	programmable processors	en_US
dc.subject	processors	en_US
dc.title	A model of programmable processors	en_US
dc.type	Article	en_US