Digital Systems Synthesis based on Direct Translation of Petri Net Model

Abstract

This paper describes a digital system design method based on direct translation of a Petri net model into an FPGA circuit netlist. A proposed CAD tool allows digital system specification, modeling validation and synthesis using ordinary Petri nets. The digital system synthesis is based on Hardware Petri nets that are composed of two kinds of processing elements (Places and Transitions) and data flow path between them. The use of Hardware Petri nets in CAD tools allows the automation of the FPGA implementation process and substantially reduces the design time and cost.